The panel explored the future of semiconductor manufacturing and materials, specifically focusing on Fully Depleted Silicon on Insulator (FD-SOI) technology, which delivers significant value to manufacturers, designers and the end consumer. Panelists discussed the benefits of FD-SOI in both planar and 3D Fin-FET applications, citing the technology's ability to produce a lower-cost product with an increase in performance and decrease in power consumption.
Panel participants included:
ARM: Ron Moore - Director of Strategic Accounts Marketing, Physical IP Division
GlobalFoundries: Subramani Kengeri - Vice President of Design Solutions
IBM: Gary Patton - Vice President of the Semiconductor Research and Development Center
SOI Industry Consortium: Horacio Mendez - Executive Director
Soitec: Steve Longoria - Senior Vice President of World Wide Strategic Business Development
STMicroelectronics: Philippe Magarshack - Technology Research and Development Group Vice President
UC Berkeley: Chenming Calvin Hu, Ph.D. - TSMC Distinguished Professor at the University of California at Berkeley
For more information on FD-SOI technology, please explore the included links to Soitec, the SOI Industry Consortium and Advanced Substrate News.