An Insider's Look at the Future of Mobile Technologies

Silicon industry thought leaders participate in lively panel discussion at SFMOMA

Mobile Technology Panel at the SFMOMA
Mobile Technology Panel at the SFMOMA
  • Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
  • Soitec
    Soitec
    Soitec
    Soitec
  • SFMOMA
    SFMOMA
    SFMOMA
    SFMOMA
  • Soitec FD-2D Wafers
    Soitec FD-2D Wafers
    Soitec FD-2D Wafers
    Soitec FD-2D Wafers
  • Soitec FD-3D Wafers
    Soitec FD-3D Wafers
    Soitec FD-3D Wafers
    Soitec FD-3D Wafers
  • At the Heart of Innovation
    At the Heart of Innovation
    At the Heart of Innovation
    At the Heart of Innovation
  • FD-SOI
    FD-SOI
    FD-SOI
    FD-SOI
  • Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
  • Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
  • Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
    Mobile Technology Panel at the SFMOMA
On July 10, 2012, mobile technology leaders from Soitec, the SOI Industry Consortium, ARM, UC Berkeley, IBM, STMicroelectronics and GlobalFoundries gathered at the San Francisco Museum of Modern Art to discuss the current challenges facing the mobile industry. Panelists highlighted the need for chip makers and semiconductor manufacturers to innovate to meet market demand in an environment with ever-increasing costs and risks. Participants also took note of the shift in industry focus from CPUs to SoCs, and how this approach is being leveraged to meet the needs of mobile computing platforms and advanced technology specifications.

The panel explored the future of semiconductor manufacturing and materials, specifically focusing on Fully Depleted Silicon on Insulator (FD-SOI) technology, which delivers significant value to manufacturers, designers and the end consumer. Panelists discussed the benefits of FD-SOI in both planar and 3D Fin-FET applications, citing the technology's ability to produce a lower-cost product with an increase in performance and decrease in power consumption.

Panel participants included:

ARM: Ron Moore - Director of Strategic Accounts Marketing, Physical IP Division
GlobalFoundries: Subramani Kengeri - Vice President of Design Solutions
IBM: Gary Patton - Vice President of the Semiconductor Research and Development Center
SOI Industry Consortium: Horacio Mendez - Executive Director
Soitec: Steve Longoria - Senior Vice President of World Wide Strategic Business Development
STMicroelectronics: Philippe Magarshack - Technology Research and Development Group Vice President
UC Berkeley: Chenming Calvin Hu, Ph.D. - TSMC Distinguished Professor at the University of California at Berkeley

For more information on FD-SOI technology, please explore the included links to Soitec, the SOI Industry Consortium and Advanced Substrate News.